尽管自定义深度学习(DL)硬件加速器对于在边缘计算设备中进行推断具有吸引力,它们的设计和实施仍然是一个挑战。存在用于探索DL硬件加速器的开源框架。Gemmini是用于敏捷DL加速器探索的开源脉动阵列生成器。本文详细介绍了使用Gemmini生成的硬件/软件组件。不同数据流选项的通用矩阵到矩阵乘法(GEMM),包括输出/重量固定(OS/WS),在Gemmini中进行了探索,以估计相对于CPU实现的性能。在FPGA器件上实现了Gemmini硬件,以探索多个加速器参数的影响,包括数组大小,内存容量,和CPU/硬件镜像到列(im2col)模块,在面积等指标上,频率,和权力。这项工作揭示了关于表演,WS数据流相对于OS数据流提供了3倍的加速,硬件im2col操作相对于CPU上的操作提供了1.1倍的加速。对于硬件资源,阵列大小增加2倍导致面积和功率增加3.3倍,im2col模块导致面积和功率增加1.01倍和1.06倍。
Though custom deep learning (DL) hardware accelerators are attractive for making inferences in edge computing devices, their design and implementation remain a challenge. Open-source frameworks exist for exploring DL hardware accelerators. Gemmini is an open-source systolic array generator for agile DL accelerator exploration. This paper details the hardware/software components generated using Gemmini. The general matrix-to-matrix multiplication (
GEMM) of different dataflow options, including output/weight stationary (OS/WS), was explored in Gemmini to estimate the performance relative to a CPU implementation. The Gemmini hardware was implemented on an FPGA device to explore the effect of several accelerator parameters, including array size, memory capacity, and the CPU/hardware image-to-column (im2col) module, on metrics such as the area, frequency, and power. This work revealed that regarding the performance, the WS dataflow offered a speedup of 3× relative to the OS dataflow, and the hardware im2col operation offered a speedup of 1.1× relative to the operation on the CPU. For hardware resources, an increase in the array size by a factor of 2 led to an increase in both the area and power by a factor of 3.3, and the im2col module led to an increase in area and power by factors of 1.01 and 1.06, respectively.