PDF(Pubmed)
Abstract：
We investigated a flat-type p*-p LED composed of a p*-electrode with a local breakdown conductive channel (LBCC) formed in the p-type electrode region by applying reverse bias. By locally connecting the p*-electrode to the n-type layer via an LBCC, a flat-type LED structure is applied that can replace the n-type electrode without a mesa-etching process. Flat-type p*-p LEDs, devoid of the mesa process, demonstrate outstanding characteristics, boasting comparable light output power to conventional mesa-type n-p LEDs at the same injection current. However, they incur higher operating voltages, attributed to the smaller size of the p* region used as the n-type electrode compared to conventional n-p LEDs. Therefore, despite having comparable external quantum efficiency stemming from similar light output, flat-type p*-p LEDs exhibit diminished wall-plug efficiency (WPE) and voltage efficiency (VE) owing to elevated operating voltages. To address this, our study aimed to mitigate the series resistance of flat-type p*-p LEDs by augmenting the number of LBCCs to enhance the contact area, thereby reducing overall resistance. This structure holds promise for elevating WPE and VE by aligning the operating voltage more closely with that of mesa-type n-p LEDs. Consequently, rectifying the issue of high operating voltages in planar p*-p LEDs enables the creation of efficient LEDs devoid of crystal defects resulting from mesa-etching processes.
摘要：
我们研究了一种扁平型p*-pLED，该LED由p*电极组成，并通过施加反向偏置在p型电极区域中形成了局部击穿导电通道（LBCC）。通过LBCC将p*电极局部连接到n型层，应用平面型LED结构,其可以在没有台面蚀刻工艺的情况下代替n型电极。平板型p*-pLED，没有台面过程，表现出突出的特点，在相同的注入电流下，具有与传统台面型n-pLED相当的光输出功率。然而,它们产生更高的工作电压，归因于与常规n-pLED相比用作n型电极的p*区的尺寸较小。因此,尽管具有来自相似光输出的相当的外部量子效率，扁平型p*-pLED由于升高的工作电压而表现出降低的壁插效率（WPE）和电压效率（VE）。为了解决这个问题，我们的研究旨在通过增加LBCC的数量来增加接触面积来减轻平板型p*-pLED的串联电阻，从而降低整体阻力。这种结构有望通过使工作电压与台面型n-pLED的工作电压更紧密地对准来提高WPE和VE。因此,对平面p*-pLED中的高操作电压的问题进行整流使得能够产生没有由台面蚀刻工艺导致的晶体缺陷的高效LED。
